|Serial access||volatile||Charge coupled||RW|
In a serial access device data is stored in such a way that data has to be read in sequence and in the order in which it was written. It is not possible to pick out an individual data byte without reading through to that point or at least reading a block of data and then finding the byte required. To put it more precisely, the access time for a particular byte is variable and depends on what has just been read (or written). For example in a magnetic tape system if the last byte has just been read and we now wish to read the first byte then we may have to wait a few minutes for the tape to be rewound.
A random access device, however, allows access to any data byte individually and the access time is fixed and not dependent on previous read or write operations.
Volatile or non-volatile refers to whether or not the data remains stored when the power is removed. Clearly a volatile device can be made non-volatile by adding emergency power usually in the form of rechargeable batteries which are trickle charged while the power is on. The feasibility of this depends on the power consumption so that it is simple to provide battery back-up for a small semiconductor RAM but it is less feasible for a 1GByte hard disc.
Random access devices are inherently faster then serial devices and so have to be used for the instruction memory in any computer system. Semiconductor memories are used as the main memory for almost all computer systems these days except where operating conditions such as wide temperature variations or high levels of radiation make them unsuitable.
Serial memory devices usually have a much higher packing density because the address depends on position in the stream of data rather than having to be individually coded. The address decoding and data access paths account for the majority of the space on a semiconductor memory chip. Serial devices are therefore used as backing store for large amounts of data or for programs when they are actually being used. Disc stores are the most obvious examples of this although for really large amounts of data magnetic tapes and optical discs (CD ROMS) provide much higher packing densities and the ability to archive data cheaply.
Another distinction between memory devices is whether data can be written and read or just read, referred to as read-only or read- write devices (or wrongly as RAM). Strictly no device can be considered as read-only because if we can't write data into it at some point it would be completely useless. The terminology refers to normal usage in the computer system. Read-only memory is often written at the manufacturing stage or in a special programming device outside the computer system. Sometimes, as with optical discs, the data can be written once but not modified, in other words it is write-once memory. A few devices can be written to slowly but read quickly such as some non-volatile semiconductor memories. These might be referred to as read-mostlymemories.
ECL - ECL logic uses bipolar transistors in a current switching non-saturating configuration which results in very high speed. The basic circuits are complex, however, which results in poor packing density. ECL memories are therefore relatively small. Very high power dissipation also limits number of devices on chip and special cooling arrangements may be necessary.
TTL - uses bipolar transistors in more conventional circuits. Speed id high but density not very high because of the complexity and number of processing steps involved in making bipolar devices.
NMOS - uses MOS transistors in very simple circuits which results in very high packing densities. The capacitance of MOS devices limits speeds although they can sometimes approach those of TTL.
CMOS - uses N and P type MOS transistors in complementary and symmetrical circuits resulting in very low power dissipation. Speeds are lower than NMOS and because of more complex processing packing density is also lower.
All the devices in a system frequently use the same technology. This avoids problems of matching voltage and current levels and means that devices have comparable speeds. Logic levels for CMOS and NMOS can usually be matched to TTL levels thus allowing mixing where necessary e.g. CMOS low power RAM for battery backed-up memory in an otherwise NMOS system or TTL address decoders to reduce gate delays in an NMOS system.
ROM, in common with most semiconductor memory, is arranged in matrix form where a ROW of data is selected by a subset of the address lines and then the COLUMN in which the data bit is selected by the remaining address lines.
In the example below, the matrix is also split between 8 planes where each plane supplies one bit to the data bus.
One example of timing for a 6800-compatible ROM is given below. Note that the precharge time is not always required with later ROMs and that the access time alone does not indicate how often data may be read from the ROM. The cycle time is the shortest time between successive reads of the ROM.
/CE pulse width
/CE access time
Output turn-off delay
Address & CS hold time to /CE
Address & CS setup time to /CE
/CE precharge time